XBAR (信号互联配置)
简介
XBAR模块主要功能,是为芯片的输入管脚,输出管脚和内部模块之间提供灵活的连接关系,这些连接关系可通过配置进行路由选择, 同时可以通过内部集成的可配置逻辑单元(CLU)对部分连接关系进行逻辑运算,以提供更大的灵活性和可能性。
功能概述
XBAR模块主要包含以下几种类型的XBAR子单元:
INXB(INPUT XBAR)
PFXB(SrPWM XBAR)
ETXB(ETIMER XBAR)
CLU (3组处理单元,分别输出到ADC CLU, ETIMER CLU, OUTPUT XBAR CLU)
OPXB(OUTPUT XBAR)
软件配置流程
XBAR模块软件配置流程如下:
解锁XBAR寄存器写保护
根据输入信号MUX表选择对应的输入信号
根据每个模块的特性,分别设置对应输入通道的输入滤波,输入极性。
选择对应的输出通道,并配置输出通道的配置参数,如输出是否取反,输出信号处理方式,输出是否展宽等。
配置XBAR MUX寄存器,选择XBAR模块输入的信号对应的输出通道
设置输出通道使能
上锁XBAR寄存器写保护
另外:如果配置INXB模块,还需要考虑INXB输出是否经过CLU单元,如果需要,还需要进行以下额外配置:
配置对应CLU单元,选择需要输入的INXB 输出信号
选择是否需要BYBASS该信号
选择对应CLU单元对信号处理的逻辑算法模式
配置对应输出的中断触发类型,并使能该通道中断
配置对应输出的输出极性,最后使能输出
对应的配置示例代码如下:
/* 1. unclock reg protect */
_XBAR_REG_WR_UNLOCK();
/* 2. Input channel config */
XBAR_initInputChMsk(&inChMsk);
/* 3. add XBAR XCOX output channel 0 to OPXB input */
XBAR_addInputSource(&inChMsk, OPXB_SRC_MUX24_INPUTXBAR_CLU2OUT0);
/* 4. setup signal map between XBAR XCOX CH0 to OPXB output ch 0~3 */
XBAR_OPXB_setMuxConfig((uint8_t)BIT_MASK(0), &inChMsk);
/* 5. Enable Output CH0 and disable interrupt */
XBAR_OPXB_enableOutputMux((uint8_t)BIT_MASK(0));
/* 6. lock reg */
_XBAR_REG_WR_LOCK();
输入源的添加
XBAR模块的输入源添加是通过 XBAR_addInputSource() 函数实现的。该函数允许将特定的输入信号源添加到XBAR的输入通道中。
重要
每个XBAR子模块的每一个输出通道 都可以选择多个输入源MUX组进行逻辑或操作,但是每一个MUX输入组只能选择一个输入源。
在添加输入源到不同的输出通道前,需要调用
XBAR_initInputChMsk()函数初始化输入通道掩码。
举例说明,以PFXB为例,可以同时添加MUX0组的ADCA_EVT0 、MUX1组的CMP_EVT1 MUX2组的CMP_EVT2_OR_EVT3 到输出通道0。 但是不能同时添加MUX0组的ADCA_EVT0 和 MUX0组的CMP_EVT0_OR_EVT1 到同一个输出通道。
// 输出通道0添加输入源
XBAR_initInputChMsk(&inChMsk);
XBAR_addInputSource(&inChMsk, PFXB_SRC_MUX0_ADCA_EVT0);
XBAR_addInputSource(&inChMsk, PFXB_SRC_MUX1_CMP_EVT1);
XBAR_addInputSource(&inChMsk, PFXB_SRC_MUX2_CMP_EVT2_OR_EVT3);
XBAR_PFXB_setMuxConfig(OUT_CH0, &inChMsk);
XBAR_PFXB_enableOutputMux(OUT_CH0);
// 输出通道1添加输入源
XBAR_initInputChMsk(&inChMsk); // 记得添加输入源前需要先初始化输入通道掩码
XBAR_addInputSource(&inChMsk, PFXB_SRC_MUX07_ETIMOUT3);
XBAR_addInputSource(&inChMsk, PFXB_SRC_MUX09_ETIMOUT4);
XBAR_addInputSource(&inChMsk, PFXB_SRC_MUX11_ADCC_EVT3);
XBAR_PFXB_setMuxConfig(OUT_CH1, &inChMsk);
XBAR_PFXB_enableOutputMux(OUT_CH1);
INXB(Input XBAR)
Input XBAR 输入均来自 GPIO, 84 个 GPIO 信号经过极性选择, 信号同步, 接口滤波后, 进行信号输出选择, 每个输出信号可选择任意一路 GPIO 或多路 GPIO 的逻辑或作为输出, 同时支持对输出信号进行锁存和取沿, 输出使能控制和输出极性选择。
Input XBAR支持的功能特性包含:
输入滤波窗口设置(每8个GPIO端口共享一组配置值)
输入滤波使能配置
输入极性配置
输出信号处理配置
输出锁存清除配置
输出使能配置
输出极性选择配置
输出mux选择配置
输出状态和输出锁存状态获取
输出中断使能(输出通道12~15)
输出中断掩码配置
输出中断强制触发
输出中断状态获取
输出中断状态清除
Input XBAR 的输入源最大支持 84 路,输出最大支持16路:
输入 |
输出 |
|---|---|
GPIO0_0~GPIO0_15 GPIO1_0~GPIO1_15 GPIO2_0~GPIO2_15 GPIO3_0~GPIO3_15 GPIO4_0~GPIO4_15 GPIO5_0~GPIO5_3 |
XCSA |
XCET |
|
XCOX |
|
PFXB |
|
ETXB |
|
OPXB |
备注
上表中的 GPIO0_0~GPIO0_15 表述对于GPIOA组的16个PIN. 具体的映射关系参考 inc/et6x_pinmap.h
INXB输出通道与SrPWM模块的连接关系
Input XBAR的 输出信号部分被送到SrPWM模块,作为故障触发或者同步信号。更详细的介绍请参考用户手册SrPWM模块 Fault信号处理 章节
INXB输出通道 |
PWM通道 |
PWM前级故障实时信号 |
PWM前级故障锁存信号 |
|---|---|---|---|
0 |
0~3 [1] |
SRPWM_PREP_SIG_FAULT_REAL0 |
SRPWM_PREP_SIG_FAULT_LATCH0 |
1 |
0~3 |
SRPWM_PREP_SIG_FAULT_REAL1 |
SRPWM_PREP_SIG_FAULT_LATCH1 |
2 |
4~7 |
SRPWM_PREP_SIG_FAULT_REAL0 |
SRPWM_PREP_SIG_FAULT_LATCH0 |
3 |
4~7 |
SRPWM_PREP_SIG_FAULT_REAL1 |
SRPWM_PREP_SIG_FAULT_LATCH1 |
4 |
8~11 |
SRPWM_PREP_SIG_FAULT_REAL0 |
SRPWM_PREP_SIG_FAULT_LATCH0 |
5 |
8~11 |
SRPWM_PREP_SIG_FAULT_REAL1 |
SRPWM_PREP_SIG_FAULT_LATCH1 |
INXB支持4路中断输出,支持中断输出的通道固定为输出通道CH12~CH15.
PFXB(SRPWM Fault XBAR)
PFXB模块功能特性与INXB类似,主要包含以下特性:
输出信号处理配置
输出锁存清除配置
输出使能配置
输出极性选择配置
输出mux选择配置
输出状态获取
SrPWM XBAR 的输入源最大支持128路,输出最大支持12路。
输入信号如下表,共32组,每组4个输入选一个输出信号。
MUX |
0 |
1 |
2 |
3 |
|---|---|---|---|---|
0 |
CMP_EVT0 |
CMP_EVT0_OR_EVT1 |
ADCA_EVT0 |
Reserved |
1 |
CMP_EVT1 |
INPUTXBAR0 |
ADCA_EVT1 |
ETIMOUT0 |
2 |
CMP_EVT2 |
CMP_EVT2_OR_EVT3 |
ADCA_EVT2 |
Reserved |
3 |
CMP_EVT3 |
INPUTXBAR1 |
ADCA_EVT3 |
ETIMOUT1 |
4 |
CMP_EVT4 |
CMP_EVT4_OR_EVT5 |
ADCB_EVT0 |
Reserved |
5 |
CMP_EVT5 |
INPUTXBAR2 |
ADCB_EVT1 |
ETIMOUT2 |
6 |
CMP_EVT6 |
CMP_EVT6_OR_EVT7 |
ADCB_EVT2 |
Reserved |
7 |
CMP_EVT7 |
INPUTXBAR3 |
ADCB_EVT3 |
ETIMOUT3 |
8 |
Reserved |
Reserved |
ADCC_EVT0 |
Reserved |
9 |
Reserved |
INPUTXBAR4 |
ADCC_EVT1 |
ETIMOUT4 |
10 |
Reserved |
ADCSOCAO |
ADCC_EVT2 |
Reserved |
11 |
Reserved |
INPUTXBAR5 |
ADCC_EVT3 |
Reserved |
12 |
ERRORSTS |
Reserved |
FLASH_ERR |
Reserved |
13 |
EXTSYNCOUT |
INPUTXBAR6 |
CPU_HALT |
Reserved |
14 |
Reserved |
ADCSOCBO |
SYS_ERR |
Reserved |
15 |
Reserved |
INPUTXBAR7 |
PT_ERR |
ETIMOUT5 |
16 |
SD0FLT0_EVT0 |
SD0FLT0_EVT0_OR_EVT1 |
Reserved |
Reserved |
17 |
SD0FLT0_EVT1 |
INPUTXBAR8 |
Reserved |
ETIMOUT6 |
18 |
SD0FLT1_EVT0 |
SD0FLT1_EVT0_OR_EVT1 |
Reserved |
Reserved |
19 |
SD0FLT1_EVT1 |
INPUTXBAR9 |
Reserved |
ETIMOUT7 |
20 |
SD0FLT2_EVT0 |
SD0FLT2_EVT0_OR_EVT1 |
Reserved |
Reserved |
21 |
SD0FLT2_EVT1 |
INPUTXBAR10 |
Reserved |
ETIMOUT8 |
22 |
SD0FLT3_EVT0 |
SD0FLT3_EVT0_OR_EVT1 |
Reserved |
Reserved |
23 |
SD0FLT3_EVT1 |
INPUTXBAR11 |
Reserved |
ETIMOUT9 |
24 |
SD1FLT0_EVT0 |
SD1FLT0_EVT0_OR_EVT1 |
SRPWM_XBAR_SYNC0 |
Reserved |
25 |
SD1FLT0_EVT1 |
INPUTXBAR12 |
Reserved |
ETIMOUT10 |
26 |
SD1FLT1_EVT0 |
SD1FLT1_EVT0_OR_EVT1 |
SRPWM_XBAR_SYNC1 |
Reserved |
27 |
SD1FLT1_EVT1 |
INPUTXBAR13 |
Reserved |
ETIMOUT11 |
28 |
SD1FLT2_EVT0 |
SD1FLT2_EVT0_OR_EVT1 |
SRPWM_XBAR_SYNC2 |
Reserved |
29 |
SD1FLT2_EVT1 |
INPUTXBAR14 |
Reserved |
ETIMOUT12 |
30 |
SD1FLT3_EVT0 |
SD1FLT3_EVT0_OR_EVT1 |
SRPWM_XBAR_SYNC3 |
Reserved |
31 |
SD1FLT3_EVT1 |
INPUTXBAR15 |
ERRORSTS |
ETIMOUT13 |
PFXB输出通道与SrPWM模块的连接关系
SrPWM XBAR的 输出信号被送到SrPWM模块,作为故障触发或者同步信号。更详细的介绍请参考用户手册19.4.8 Fault信号处理章节
PFXB输出通道 |
PWM通道 |
PWM前级故障实时信号 |
PWM前级故障锁存信号 |
|---|---|---|---|
0 |
0~3 [1] |
SRPWM_PREP_SIG_FAULT_REAL2 |
SRPWM_PREP_SIG_FAULT_LATCH2 |
1 |
0~3 |
SRPWM_PREP_SIG_FAULT_REAL3 |
SRPWM_PREP_SIG_FAULT_LATCH3 |
2 |
0~3 |
SRPWM_PREP_SIG_FAULT_REAL4 |
SRPWM_PREP_SIG_FAULT_LATCH4 |
3 |
0~3 |
SRPWM_PREP_SIG_FAULT_REAL5 |
SRPWM_PREP_SIG_FAULT_LATCH5 |
4 |
4~7 |
SRPWM_PREP_SIG_FAULT_REAL2 |
SRPWM_PREP_SIG_FAULT_LATCH2 |
5 |
4~7 |
SRPWM_PREP_SIG_FAULT_REAL3 |
SRPWM_PREP_SIG_FAULT_LATCH3 |
6 |
4~7 |
SRPWM_PREP_SIG_FAULT_REAL4 |
SRPWM_PREP_SIG_FAULT_LATCH4 |
7 |
4~7 |
SRPWM_PREP_SIG_FAULT_REAL5 |
SRPWM_PREP_SIG_FAULT_LATCH5 |
8 |
8~11 |
SRPWM_PREP_SIG_FAULT_REAL2 |
SRPWM_PREP_SIG_FAULT_LATCH2 |
9 |
8~11 |
SRPWM_PREP_SIG_FAULT_REAL3 |
SRPWM_PREP_SIG_FAULT_LATCH3 |
10 |
8~11 |
SRPWM_PREP_SIG_FAULT_REAL4 |
SRPWM_PREP_SIG_FAULT_LATCH4 |
11 |
8~11 |
SRPWM_PREP_SIG_FAULT_REAL5 |
SRPWM_PREP_SIG_FAULT_LATCH5 |
OPXB(Output XBAR)
Output XBAR的输出可直接输出到外部管脚上。
OPXB模块功能特性与INXB类似,主要包含以下特性:
输出锁存使能
输出锁存清除配置
输出使能配置
输出极性选择配置
输出mux选择配置
软件配置输入信号
Output XBAR 的输入信号来源内部各信号, 总共支持128个输入源。可输出14路Output XBAR Out信号。
MUX |
0 |
1 |
2 |
3 |
|---|---|---|---|---|
0 |
CMP_OUT0 |
CMP_OUT0_OR_OUT1 |
ADCA_EVT0 |
Reserved |
1 |
CMP_OUT1 |
INPUTXBAR0 |
ADCA_EVT1 |
ETIMOUT0 |
2 |
CMP_OUT2 |
CMP_OUT2_OR_OUT3 |
ADCA_EVT2 |
Reserved |
3 |
CMP_OUT3 |
INPUTXBAR1 |
ADCA_EVT3 |
ETIMOUT1 |
4 |
CMP_OUT4 |
CMP_OUT4_OR_OUT5 |
ADCB_EVT0 |
Reserved |
5 |
CMP_OUT5 |
INPUTXBAR2 |
ADCB_EVT1 |
ETIMOUT2 |
6 |
CMP_OUT6 |
CMP_OUT6_OR_OUT7 |
ADCB_EVT2 |
Reserved |
7 |
CMP_OUT7 |
INPUTXBAR3 |
ADCB_EVT3 |
ETIMOUT3 |
8 |
Reserved |
CFG_OPXB_SWx |
ADCC_EVT0 |
Reserved |
9 |
Reserved |
INPUTXBAR4 |
ADCC_EVT1 |
ETIMOUT4 |
10 |
Reserved |
ADCSOCAO |
ADCC_EVT2 |
Reserved |
11 |
Reserved |
INPUTXBAR5 |
ADCC_EVT3 |
Reserved |
12 |
ERRORSTS |
CFG_OPXB_SWx |
FLASH_ERR |
Reserved |
13 |
EXTSYNCOUT |
INPUTXBAR6 |
CPU_HALT |
Reserved |
14 |
Reserved |
ADCSOCBO |
SYS_ERR |
Reserved |
15 |
Reserved |
INPUTXBAR7 |
PT_ERR |
ETIMOUT5 |
16 |
SD0FLT0_EVT0 |
SD0FLT0_EVT0_OR_EVT1 |
STM0_OC0 |
Reserved |
17 |
SD0FLT0_EVT1 |
INPUTXBAR8 |
STM0_OC1 |
ETIMOUT6 |
18 |
SD0FLT1_EVT0 |
SD0FLT1_EVT0_OR_EVT1 |
STM0_OC2 |
Reserved |
19 |
SD0FLT1_EVT1 |
INPUTXBAR9 |
STM0_OC3 |
ETIMOUT7 |
20 |
SD0FLT2_EVT0 |
SD0FLT2_EVT0_OR_EVT1 |
STM1_OC0 |
Reserved |
21 |
SD0FLT2_EVT1 |
INPUTXBAR10 |
STM1_OC1 |
ETIMOUT8 |
22 |
SD0FLT3_EVT0 |
SD0FLT3_EVT0_OR_EVT1 |
STM1_OC2 |
Reserved |
23 |
SD0FLT3_EVT1 |
INPUTXBAR11 |
STM1_OC3 |
ETIMOUT9 |
24 |
SD1FLT0_EVT0 |
SD1FLT0_EVT0_OR_EVT1 |
SRPWM_XBAR_SYNC0 |
INPUTXBAR_CLU2OUT[0] |
25 |
SD1FLT0_EVT1 |
INPUTXBAR12 |
Reserved |
ETIMOUT10 |
26 |
SD1FLT1_EVT0 |
SD1FLT1_EVT0_OR_EVT1 |
SRPWM_XBAR_SYNC1 |
INPUTXBAR_CLU2OUT[1] |
27 |
SD1FLT1_EVT1 |
INPUTXBAR13 |
Reserved |
ETIMOUT11 |
28 |
SD1FLT2_EVT0 |
SD1FLT2_EVT0_OR_EVT1 |
SRPWM_XBAR_SYNC2 |
INPUTXBAR_CLU2OUT[2] |
29 |
SD1FLT2_EVT1 |
INPUTXBAR14 |
Reserved |
ETIMOUT12 |
30 |
SD1FLT3_EVT0 |
SD1FLT3_EVT0_OR_EVT1 |
SRPWM_XBAR_SYNC3 |
INPUTXBAR_CLU2OUT[3] |
31 |
SD1FLT3_EVT1 |
INPUTXBAR15 |
ERRORSTS |
ETIMOUT13 |
ETXB(ETIMER XBAR)
ETIMER XBAR的输出可送往ETIMER模块,用于ECAP的捕获触发或者ETIMER Fault信号输入。
ETXB模块功能特性与INXB类似,主要包含以下特性:
输出锁存使能
输出锁存清除配置
输出使能配置
输出极性选择配置
输入mux选择配置
输出状态获取
软件可配置输入信号源
ETIMER XBAR 的输入信号来源内部各信号, 总共支持128个输入源。可输出14路ETIMER Out信号。 ETIMER Trigger XBAR 的输入源最大支持128路,输出最大支持14路。
MUX |
0 |
1 |
2 |
3 |
|---|---|---|---|---|
0 |
CMP_EVT0 |
CMP_EVT0_OR_EVT1 |
ADCA_EVT0 |
Reserved |
1 |
CMP_EVT1 |
INPUTXBAR0 |
ADCA_EVT1 |
Reserved |
2 |
CMP_EVT2 |
CMP_EVT2_OR_EVT3 |
ADCA_EVT2 |
Reserved |
3 |
CMP_EVT3 |
INPUTXBAR1 |
ADCA_EVT3 |
Reserved |
4 |
CMP_EVT4 |
CMP_EVT4_OR_EVT5 |
ADCB_EVT0 |
Reserved |
5 |
CMP_EVT5 |
INPUTXBAR2 |
ADCB_EVT1 |
Reserved |
6 |
CMP_EVT6 |
CMP_EVT6_OR_EVT7 |
ADCB_EVT2 |
Reserved |
7 |
CMP_EVT7 |
INPUTXBAR3 |
ADCB_EVT3 |
Reserved |
8 |
Reserved |
Reserved |
ADCC_EVT0 |
Reserved |
9 |
Reserved |
INPUTXBAR4 |
ADCC_EVT1 |
Reserved |
10 |
Reserved |
Reserved |
ADCC_EVT2 |
Reserved |
11 |
Reserved |
INPUTXBAR5 |
ADCC_EVT3 |
Reserved |
12 |
ERRORSTS |
Reserved |
FLASH_ERR |
Reserved |
13 |
EXTSYNCOUT |
INPUTXBAR6 |
CPU_HALT |
Reserved |
14 |
Reserved |
CFG_ETXB_SWx |
SYS_ERR |
Reserved |
15 |
Reserved |
INPUTXBAR7 |
PT_ERR |
Reserved |
16 |
SD0FLT0_EVT0 |
SD0FLT0_EVT0_OR_EVT1 |
Reserved |
Reserved |
17 |
SD0FLT0_EVT1 |
INPUTXBAR8 |
Reserved |
Reserved |
18 |
SD0FLT1_EVT0 |
SD0FLT1_EVT0_OR_EVT1 |
Reserved |
Reserved |
19 |
SD0FLT1_EVT1 |
INPUTXBAR9 |
Reserved |
Reserved |
20 |
SD0FLT2_EVT0 |
SD0FLT2_EVT0_OR_EVT1 |
Reserved |
Reserved |
21 |
SD0FLT2_EVT1 |
INPUTXBAR10 |
Reserved |
Reserved |
22 |
SD0FLT3_EVT0 |
SD0FLT3_EVT0_OR_EVT1 |
Reserved |
Reserved |
23 |
SD0FLT3_EVT1 |
INPUTXBAR11 |
Reserved |
Reserved |
24 |
SD1FLT0_EVT0 |
SD1FLT0_EVT0_OR_EVT1 |
Reserved |
Reserved |
25 |
SD1FLT0_EVT1 |
INPUTXBAR12 |
Reserved |
Reserved |
26 |
SD1FLT1_EVT0 |
SD1FLT1_EVT0_OR_EVT1 |
Reserved |
Reserved |
27 |
SD1FLT1_EVT1 |
INPUTXBAR13 |
Reserved |
Reserved |
28 |
SD1FLT2_EVT0 |
SD1FLT2_EVT0_OR_EVT1 |
Reserved |
Reserved |
29 |
SD1FLT2_EVT1 |
INPUTXBAR14 |
Reserved |
Reserved |
30 |
SD1FLT3_EVT0 |
SD1FLT3_EVT0_OR_EVT1 |
CFG_ETXB_SWx |
Reserved |
31 |
SD1FLT3_EVT1 |
INPUTXBAR15 |
ERRORSTS |
Reserved |
CLU(Configurable Logic Unit)
XBRA模块内部包含3组CLU处理单元。3组CLU的实现完全一致,只是连接关系不同。3组CLU根据连接关系的不同可分为:
XCSA (CLU->ADC)
XCET (CLU->ETIMER)
XCOX (CLU->OutputXBAR)
3个CLU 的输入信号来源均来自Input XBAR的输出。经过3个CLU单元处理后可输出到ADC, ETIMER 及 Output XBAR模块。 每个CLU单元的输入源最大支持16路,输出最大支持4路。
如上图所示,每个CLU模块的输入是顺序对应下文中的门1,2,3,4。4路输入信号经过选择后的逻辑单元后输出一路信号。
输入 |
输出 |
|---|---|
INXB_Out0~15 |
XCSA_Out0~3 |
XCET_Out0~3 |
|
XCOX_Out0~3 |
CLU输入信号进行4MUX1操作进入逻辑处理单元,逻辑处理单元总共支持8种操作类型。
Mode |
逻辑操作 |
|---|---|
000 |
AND-OR |
001 |
OR-XOR |
010 |
4输入AND |
011 |
S-R锁存器 |
100 |
带置1和复位功能1输入D触发器 |
101 |
带置1和复位功能2输入D触发器 |
110 |
带复位功能J-K触发器 |
111 |
带置1和复位功能透明锁存器 |
CLU支持1路聚合中断输出,12个输出通道中断状态可通过 XBAR_CLU_getChInterruptStatus() 查询.
应用示例
GPIO输入经过INXB-CLU-OPXB示例:XBAR/XBAR_GPIOToOPXB。
GPIO输入后经过CLU逻辑运行并产生中断示例:XBAR/XBAR_CLU_INT。
设置不同输入源通过XBAR对SRPWM前级保护不同模式下进行封波示例:XBAR/XBAR_ADC_GPIO_CMPC_To_PWM_Trip。
GPIO输入后输出信号检测中断示例:XBAR/XBAR_INXB_INT。
API Reference
Header File
Functions
-
DRV_Status XBAR_initInputChMsk(XBAR_InChMsk_TypeDef *in_ch_mask)
Reset struct XBAR_InChMsk_TypeDef for add source next.
- 参数:
in_ch_mask –
- 返回:
DRV_Status
-
DRV_Status XBAR_addInputSource(XBAR_InChMsk_TypeDef *in_ch_mask, uint8_t ch_idx)
Add input channel source to in_ch_mask struct.
- Attention
in_ch_mask should be reset before start a new input channels add in
- 参数:
in_ch_mask – Pointer to in_ch_mask, input channel mask initialized by XBAR_initInputChMsk
ch_idx – XBAR input channel index
- 返回:
DRV_Status
-
DRV_Status XBAR_INXB_setInputFilterWnd(XBAR_INXB_FILTERWND_GRP_Def gpio_grp, uint16_t filter_dly)
Set INXB GPIO group Filter Window value, per 8 inputs share one value.
- Attention
This parameter setting takes effect for all input channels in one filer group
- 参数:
gpio_grp – INXB Filter Window GPIO group, per 8 gpios in a group share filter window value
filter_dly – 0 ~1023, filter clk = ahbclk/2/filter_dly
- 返回:
DRV_Status
-
DRV_Status XBAR_INXB_initInputChannel(XBAR_INXB_InCfg_TypeDef *cfg, XBAR_InChMsk_TypeDef *in_ch_mask)
Configure INXB Input Channel Paramater.
- 参数:
cfg –
inFilterEn Filter Enable or Disable
inInvertEn Input invert Enable or Disable
inEdgeType
in_ch_mask – input channel valid mask, XBAR_addInputSource can invoked to fill input source to in_ch_mask
- 返回:
DRV_Status
-
DRV_Status XBAR_INXB_setMuxConfig(uint16_t out_ch_mask, XBAR_InChMsk_TypeDef *in_ch_mask)
Configure INXB Input Mux total of 16 channels of output, each channel of output can choose 80 input channel after every 4 choose 1 mux, that is, total 20 mux groups.
- 参数:
out_ch_mask – Which Output channel for mux input
in_ch_mask – Which Input channel input to mux for 4 chose 1 4 channels a group, take effect on the last mux. For example, if in_ch_mask is xxxx_0b0111_xxxx, ch2 selected
- 返回:
DRV_Status
-
DRV_Status XBAR_INXB_initOutputChannel(XBAR_OutCfg_TypeDef *cfg, uint16_t out_ch_mask)
Configure INXB Input Channel Paramater.
- 参数:
cfg –
outDsel output signal type select
outPolarInvertEn output signal polar reversal Enable or Disable
out_ch_mask – output channel valid mask
- 返回:
DRV_Status
-
DRV_Status XBAR_INXB_enableOutputMux(uint16_t out_ch_mask)
Enable output.
- 参数:
out_ch_mask –
- 返回:
DRV_Status
-
DRV_Status XBAR_INXB_disableOutputMux(uint16_t out_ch_mask)
Disable output.
- 参数:
out_ch_mask –
- 返回:
DRV_Status
-
DRV_Status XBAR_INXB_clearOutputLatch(uint16_t out_ch_mask)
Clear output latch status.
- 参数:
out_ch_mask –
- 返回:
DRV_Status
-
FlagStatus XBAR_INXB_getOutputChStatus(uint16_t out_ch, bool latched)
Get output channel status.
- 参数:
out_ch – output channel 0~15
latched – get latched status or real-time status
- 返回:
FlagStatus
-
uint32_t XBAR_INXB_getOutputStatus(bool latched)
Get XBAR INXB Output All Channel Status.
- 参数:
latched – get latched status or real-time status
- 返回:
status with all channel
-
DRV_Status XBAR_INXB_enableInterrupt(XBAR_INXB_IRQ_TypeDef it_channel_mask)
- 参数:
it_channel_mask –
- 返回:
DRV_Status
-
DRV_Status XBAR_INXB_disableInterrupt(XBAR_INXB_IRQ_TypeDef it_channel_mask)
- 参数:
it_channel_mask –
- 返回:
DRV_Status
-
DRV_Status XBAR_INXB_setInterruptMask(XBAR_INXB_IRQ_TypeDef it_channel_mask)
- 参数:
it_channel_mask –
- 返回:
DRV_Status
-
DRV_Status XBAR_INXB_clearInterruptMask(XBAR_INXB_IRQ_TypeDef it_channel_mask)
- 参数:
it_channel_mask –
- 返回:
DRV_Status
-
DRV_Status XBAR_INXB_forceTriggerInterrupt(XBAR_INXB_IRQ_TypeDef it_channel_mask)
- 参数:
it_channel_mask –
- 返回:
DRV_Status
-
DRV_Status XBAR_INXB_clearInterruptStatus(XBAR_INXB_IRQ_TypeDef it_channel_mask)
- 参数:
it_channel_mask – XBAR_INXB_IRQ_TypeDef
- 返回:
DRV_Status
-
ITStatus XBAR_INXB_getChInterruptStatus(XBAR_INXB_IRQ_TypeDef itchannel)
- 参数:
it_channel_mask – ch0~4
- 返回:
DRV_Status
-
ITStatus XBAR_INXB_getChInterruptRawStatus(XBAR_INXB_IRQ_TypeDef itchannel)
- 参数:
it_channel_mask –
- 返回:
DRV_Status
-
uint8_t XBAR_INXB_getInterruptStatus(void)
Get INXB Interrupt Status.
- 返回:
uint8_t INXB int status(4bit)
-
uint8_t XBAR_INXB_getInterruptRawStatus(void)
Get INXB Interrupt Raw Status.
- 返回:
uint8_t INXB raw int status(4bit)
-
DRV_Status XBAR_PFXB_setMuxConfig(uint32_t out_ch_mask, XBAR_InChMsk_TypeDef *in_ch_mask)
Configures PWM Fault XBAR output MUX.
- 参数:
out_ch_mask –
in_ch_mask –
- 返回:
DRV_Status
-
DRV_Status XBAR_PFXB_initOutputChannel(XBAR_OutCfg_TypeDef *cfg, uint16_t out_ch_mask)
Configure PFXB Input Channel Paramater.
- 参数:
cfg –
outDsel output signal type select
outPolarInvertEn output signal polar reversal Enable or Disable
out_ch_mask – output channel valid mask
- 返回:
DRV_Status
-
DRV_Status XBAR_PFXB_enableOutputMux(uint32_t out_ch_mask)
Enable output.
- 参数:
out_ch_mask – ch0~ch16 mask
- 返回:
DRV_Status
-
DRV_Status XBAR_PFXB_disableOutputMux(uint32_t out_ch_mask)
Disable output.
- 参数:
out_ch_mask – ch0~ch16 mask
- 返回:
DRV_Status
-
DRV_Status XBAR_PFXB_clearOutputLatch(uint32_t out_ch_mask)
Clear output latch status.
- 参数:
out_ch_mask – ch0~ch16 mask
- 返回:
DRV_Status
-
FlagStatus XBAR_PFXB_getOutputChStatus(uint32_t out_ch, bool latched)
Get XBAR PFXB Output Channel Latch Status.
- 参数:
out_ch – channel number 0~16
latched –
- 返回:
FlagStatus
-
uint32_t XBAR_PFXB_getOutputStatus(bool latched)
Get XBAR PFXB Output All Channel Latch Status.
- 参数:
latched – get latched status or real-time status
- 返回:
status with all channel
-
DRV_Status XBAR_ETXB_setMuxConfig(uint16_t out_ch_mask, XBAR_InChMsk_TypeDef *in_ch_mask)
Configures ETIMER XBAR output MUX.
- 参数:
out_ch_mask –
in_ch_mask –
- 返回:
DRV_Status
-
DRV_Status XBAR_ETXB_initOutputChannel(XBAR_OutCfg_TypeDef *cfg, uint16_t out_ch_mask)
Configure ETXB Input Channel Paramater.
- 参数:
cfg –
outDsel output signal type select
outPolarInvertEn output signal polar reversal Enable or Disable
out_ch_mask – output channel valid mask
- 返回:
DRV_Status
-
DRV_Status XBAR_ETXB_enableOutputMux(uint16_t out_ch_mask)
Enable output.
- 参数:
out_ch_mask – ch0~ch11 mask
- 返回:
DRV_Status
-
DRV_Status XBAR_ETXB_disableOutputMux(uint16_t out_ch_mask)
Disable output.
- 参数:
out_ch_mask – ch0~ch11 mask
- 返回:
DRV_Status
-
DRV_Status XBAR_ETXB_clearOutputLatch(uint16_t out_ch_mask)
Clear output latch status.
- 参数:
out_ch_mask – ch0~ch11 mask
- 返回:
DRV_Status
-
DRV_Status XBAR_ETXB_setSoftwareInput(uint16_t out_ch_mask)
Set Software Trigger input.
- 参数:
sw_in_ch_mask –
- 返回:
DRV_Status
-
DRV_Status XBAR_ETXB_clearSoftwareInput(uint16_t out_ch_mask)
Clear Software Trigger input.
- 参数:
sw_in_ch_mask –
- 返回:
DRV_Status
-
FlagStatus XBAR_ETXB_getOutputChStatus(uint16_t out_ch, bool latched)
Get XBAR ETXB Output Channel Latch Status.
- 参数:
out_ch – ch0~ch11
latched –
- 返回:
FlagStatus
-
uint32_t XBAR_ETXB_getOutputStatus(bool latched)
Get XBAR ETXB Output All Channel Latch Status.
- 参数:
latched – get latched status or real-time status
- 返回:
status with all channel
-
DRV_Status XBAR_OPXB_setMuxConfig(uint16_t out_ch_mask, XBAR_InChMsk_TypeDef *in_ch_mask)
Configure OPXB Input Mux.
- Attention
every 4 input channels, if all 4 channels are masked, the last one takes effect
- 参数:
out_ch_mask – Which Output channel for mux input
in_ch_mask – Which Input channel input to mux for 4 chose 1
- 返回:
DRV_Status
-
DRV_Status XBAR_OPXB_initOutputChannel(XBAR_OutCfg_TypeDef *cfg, uint16_t out_ch_mask)
Configure OPXB Input Channel Paramater.
- 参数:
cfg –
outDsel output signal type select
outPolarInvertEn output signal polar reversal Enable or Disable
out_ch_mask – output channel valid mask
- 返回:
DRV_Status
-
DRV_Status XBAR_OPXB_enableOutputMux(uint16_t out_ch_mask)
Enable output.
- 参数:
out_ch_mask –
- 返回:
DRV_Status
-
DRV_Status XBAR_OPXB_disableOutputMux(uint16_t out_ch_mask)
Disable output.
- 参数:
out_ch_mask –
- 返回:
DRV_Status
-
DRV_Status XBAR_OPXB_clearOutputLatch(uint16_t out_ch_mask)
Clear output latch status.
- 参数:
out_ch_mask –
- 返回:
DRV_Status
-
DRV_Status XBAR_OPXB_setSoftwareInput(uint16_t out_ch_mask)
Set Software Trigger input.
- 参数:
sw_in_ch_mask –
- 返回:
DRV_Status
-
DRV_Status XBAR_OPXB_clearSoftwareInput(uint16_t out_ch_mask)
Clear Software Trigger input.
- 参数:
sw_in_ch_mask –
- 返回:
DRV_Status
-
FlagStatus XBAR_OPXB_getOutputChStatus(uint16_t out_ch, bool latched)
Get output channel latch status.
- 参数:
out_ch – output channel 0~15
latched – latch or not latch
- 返回:
FlagStatus SET or RESET
-
uint32_t XBAR_OPXB_getOutputStatus(bool latched)
Get XBAR OPXB Output All Channel Latch Status.
- 参数:
latched – latch or not latch
- 返回:
status with all channel
-
DRV_Status XBAR_CLU_setConfig(XBAR_CLU_TypeDef clu_type, uint8_t out_ch_mask, XBAR_CLU_Cfg_TypeDef *cfg)
Configure edgeType, invertEn, bypassEn, outEn, clu_type.
- 参数:
clu_type –
XBAR_CLU_XCSA
XBAR_CLU_XCET
XBAR_CLU_XCOX
out_ch_mask – max 4ch ->0x0F 0x03 : ch0~1
cfg –
- 返回:
DRV_Status
-
DRV_Status XBAR_CLU_enableInterrupt(XBAR_CLU_TypeDef clu_type, uint8_t out_ch_mask)
Enable CLU interrupt.
- 参数:
clu_type –
XBAR_CLU_XCSA
XBAR_CLU_XCET
XBAR_CLU_XCOX
out_ch_mask –
- 返回:
DRV_Status
-
DRV_Status XBAR_CLU_disableInterrupt(XBAR_CLU_TypeDef clu_type, uint8_t out_ch_mask)
Disable CLU interrupt.
- 参数:
clu_type –
XBAR_CLU_XCSA
XBAR_CLU_XCET
XBAR_CLU_XCOX
out_ch_mask –
- 返回:
DRV_Status
-
DRV_Status XBAR_CLU_setInterruptMask(XBAR_CLU_TypeDef clu_type, uint8_t out_ch_mask)
Set CLU interrupt mask.
- 参数:
clu_type –
XBAR_CLU_XCSA
XBAR_CLU_XCET
XBAR_CLU_XCOX
out_ch_mask –
- 返回:
DRV_Status
-
DRV_Status XBAR_CLU_clearInterruptMask(XBAR_CLU_TypeDef clu_type, uint8_t out_ch_mask)
Clear CLU interrupt mask.
- 参数:
clu_type –
XBAR_CLU_XCSA
XBAR_CLU_XCET
XBAR_CLU_XCOX
out_ch_mask –
- 返回:
DRV_Status
-
DRV_Status XBAR_CLU_forceTriggerInterrupt(XBAR_CLU_TypeDef clu_type, uint8_t out_ch_mask)
force trigger CLU Interrupt Status
- 参数:
clu_type –
XBAR_CLU_XCSA
XBAR_CLU_XCET
XBAR_CLU_XCOX
out_ch_mask –
- 返回:
DRV_Status
-
DRV_Status XBAR_CLU_clearInterruptStatus(XBAR_CLU_TypeDef clu_type, uint8_t out_ch_mask)
Clear CLU Interrupt Status.
- 参数:
clu_type –
XBAR_CLU_XCSA
XBAR_CLU_XCET
XBAR_CLU_XCOX
out_ch_mask –
- 返回:
DRV_Status
-
ITStatus XBAR_CLU_getChInterruptStatus(XBAR_CLU_TypeDef clu_type, uint8_t channel)
Get CLU Interrupt Status.
- 参数:
clu_type –
XBAR_CLU_XCSA
XBAR_CLU_XCET
XBAR_CLU_XCOX
channel – ch0~4
- 返回:
DRV_Status
-
ITStatus XBAR_CLU_getChInterruptRawStatus(XBAR_CLU_TypeDef clu_type, uint8_t channel)
Get CLU Interrupt Raw Status.
- 参数:
clu_type –
XBAR_CLU_XCSA
XBAR_CLU_XCET
XBAR_CLU_XCOX
channel –
- 返回:
DRV_Status
-
uint8_t XBAR_CLU_getInterruptStatus(XBAR_CLU_TypeDef clu_type)
Get CLU Interrupt Status.
- 参数:
clu_type – ref to enum XBAR_CLU_TypeDef
- 返回:
uint8_t clu int status(4bit)
-
uint8_t XBAR_CLU_getInterruptRawStatus(XBAR_CLU_TypeDef clu_type)
Get CLU Interrupt Raw Status.
- 参数:
clu_type – ref to enum XBAR_CLU_TypeDef
- 返回:
uint8_t clu raw int status(4bit)
-
DRV_Status XBAR_selectFaultMux(uint32_t fault_src_mask)
select input fault signal source
- 参数:
fault_src_mask – ref to enum XBAR_FALUT_SRC_TypeDef
- 返回:
DRV_Status
-
void XBAR_resetFaultMux(void)
reset fault signal mux selection, all fault signal in disabled
-
DRV_Status XBAR_selectStimerEFSingalOutput(XBAR_STIM_IDX_TypeDef stim_idx, XBAR_STIM_EF_SIG_TypeDef stim_es_sig, uint32_t fault_src_mask)
XBAR Stimer Emergency Stop Signal source select and enable.
- 参数:
stim_idx – reference to stimer index
stim_es_sig – stimer emergency signal source
fault_src_mask – ref to enum XBAR_FALUT_SRC_TypeDef
- 返回:
DRV_Status
-
void XBAR_resetStimerEFSignalOutput(XBAR_STIM_IDX_TypeDef stim_idx, XBAR_STIM_EF_SIG_TypeDef stim_es_sig)
XBAR Stimer Emergency Stop Signal source select disable.
- 参数:
stim_idx – reference to stimer index
stim_es_sig – stimer emergency signal source
- 返回:
DRV_Status
Structures
-
struct XBAR_INXB_InCfg_TypeDef
INXB input param configure.
-
struct XBAR_OutCfg_TypeDef
XBAR out param configure.
Public Members
-
XBAR_OUT_DSEL_TypeDef outDsel
Single input filter enable or disable, default: disable
-
ControlStatus outPolarInvertEn
Single output polar reversal, default: disable
-
ControlStatus outPulseStretchEn
Single output pulse stretch, default: disable
-
XBAR_OPXB_OEMOD_TypeDef outOEmode
Single output enable mode
-
XBAR_OUT_DSEL_TypeDef outDsel
-
struct XBAR_CLU_Cfg_TypeDef
CLU Parameters Configure.
Public Members
-
XBAR_CLU_EDGE_TypeDef edgeType
CLU output edge trigger type, default: rise edge
-
ControlStatus invertEn
CLU output invert enable or disable, default: disable
-
ControlStatus bypassEn
CLU output bypass enable or disable, default: disable
-
ControlStatus outEn
CLU output enable or disable, default: low level
-
XBAR_CLU_UNIT_TypeDef cluType
CLU logic unit type, default: AND-OR
-
XBAR_CLU_EDGE_TypeDef edgeType
Macros
-
_XBAR_REG_WR_LOCK()
-
_XBAR_REG_WR_UNLOCK()
Enumerations
-
enum XBAR_INXB_FILTERWND_GRP_Def
Input XBAR FilterWindow Group enumeration Maping, every group has 8 GPIO pins.
+—————————+———+ | INXB_FILTERWND_GPIOA_GRP0 | GPIO47 | | | GPIO48 | | | GPIO51 | | | GPIO50 | | | GPIO28 | | | GPIO46 | | | GPIO49 | | | GPIO76 | | INXB_FILTERWND_GPIOA_GRP1 | GPIO77 | | | GPIO66 | | | GPIO52 | | | GPIO53 | | | GPIO54 | | | GPIO67 | | | GPIO78 | | | GPIO79 | | INXB_FILTERWND_GPIOB_GRP0 | GPIO63 | | | GPIO68 | | | GPIO69 | | | GPIO70 | | | GPIO8 | | | GPIO4 | | | GPIO3 | | | GPIO2 | | INXB_FILTERWND_GPIOB_GRP1 | GPIO1 | | | GPIO0 | | | GPIO40 | | | GPIO23 | | | GPIO41 | | | GPIO22 | | | GPIO7 | | | GPIO44 | | INXB_FILTERWND_GPIOC_GRP0 | GPIO5 | | | GPIO9 | | | GPIO61 | | | GPIO59 | | | GPIO10 | | | GPIO34 | | | GPIO15 | | | GPIO14 | | INXB_FILTERWND_GPIOC_GRP1 | GPIO6 | | | GPIO30 | | | GPIO31 | | | GPIO29 | | | GPIO72 | | | GPIO74 | | | GPIO73 | | | GPIO75 | | INXB_FILTERWND_GPIOD_GRP0 | GPIO64 | | | GPIO80 | | | GPIO55 | | | GPIO60 | | | GPIO20 | | | GPIO21 | | | GPIO13 | | | GPIO12 | | INXB_FILTERWND_GPIOD_GRP1 | GPIO11 | | | GPIO33 | | | GPIO16 | | | GPIO17 | | | GPIO25 | | | GPIO26 | | | GPIO27 | | | GPIO37 | | INXB_FILTERWND_GPIOE_GRP0 | GPIO35 | | | GPIO43 | | | GPIO56 | | | GPIO57 | | | GPIO58 | | | GPIO39 | | | GPIO42 | | | GPIO65 | | INXB_FILTERWND_GPIOE_GRP1 | GPIO62 | | | GPIO83 | | | GPIO84 | | | GPIO85 | | | GPIO71 | | | GPIO82 | | | GPIO81 | | | GPIO45 | | INXB_FILTERWND_GPIOF_GRP0 | SWCLK | | | SWDIO | | | GPIO32 | | | GPIO24 | +—————————+———+
Values:
-
enumerator INXB_FILTERWND_GPIOA_GRP0
Input XBAR FilterWindow GRP ref to below table
-
enumerator INXB_FILTERWND_GPIOA_GRP1
Input XBAR FilterWindow GRP ref to below table
-
enumerator INXB_FILTERWND_GPIOB_GRP0
Input XBAR FilterWindow GRP ref to below table
-
enumerator INXB_FILTERWND_GPIOB_GRP1
Input XBAR FilterWindow GRP ref to below table
-
enumerator INXB_FILTERWND_GPIOC_GRP0
Input XBAR FilterWindow GRP ref to below table
-
enumerator INXB_FILTERWND_GPIOC_GRP1
Input XBAR FilterWindow GRP ref to below table
-
enumerator INXB_FILTERWND_GPIOD_GRP0
Input XBAR FilterWindow GRP ref to below table
-
enumerator INXB_FILTERWND_GPIOD_GRP1
Input XBAR FilterWindow GRP ref to below table
-
enumerator INXB_FILTERWND_GPIOE_GRP0
Input XBAR FilterWindow GRP ref to below table
-
enumerator INXB_FILTERWND_GPIOE_GRP1
Input XBAR FilterWindow GRP ref to below table
-
enumerator INXB_FILTERWND_GPIOF_GRP0
Input XBAR FilterWindow GRP ref to below table
-
enumerator INXB_FILTERWND_GPIOA_GRP0
-
enum XBAR_INXB_SRC_TypeDef
Input XBAR Source enumeration.
Values:
-
enumerator INXB_SRC_GPIOA_GPIO47
Input XBAR Source GPIOA~GPIOF
-
enumerator INXB_SRC_GPIOA_GPIO48
-
enumerator INXB_SRC_GPIOA_GPIO51
-
enumerator INXB_SRC_GPIOA_GPIO50
-
enumerator INXB_SRC_GPIOA_GPIO28
-
enumerator INXB_SRC_GPIOA_GPIO46
-
enumerator INXB_SRC_GPIOA_GPIO49
-
enumerator INXB_SRC_GPIOA_GPIO76
-
enumerator INXB_SRC_GPIOA_GPIO77
-
enumerator INXB_SRC_GPIOA_GPIO66
-
enumerator INXB_SRC_GPIOA_GPIO52
-
enumerator INXB_SRC_GPIOA_GPIO53
-
enumerator INXB_SRC_GPIOA_GPIO54
-
enumerator INXB_SRC_GPIOA_GPIO67
-
enumerator INXB_SRC_GPIOA_GPIO78
-
enumerator INXB_SRC_GPIOA_GPIO79
-
enumerator INXB_SRC_GPIOB_GPIO63
-
enumerator INXB_SRC_GPIOB_GPIO68
-
enumerator INXB_SRC_GPIOB_GPIO69
-
enumerator INXB_SRC_GPIOB_GPIO70
-
enumerator INXB_SRC_GPIOB_GPIO8
-
enumerator INXB_SRC_GPIOB_GPIO4
-
enumerator INXB_SRC_GPIOB_GPIO3
-
enumerator INXB_SRC_GPIOB_GPIO2
-
enumerator INXB_SRC_GPIOB_GPIO1
-
enumerator INXB_SRC_GPIOB_GPIO0
-
enumerator INXB_SRC_GPIOB_GPIO40
-
enumerator INXB_SRC_GPIOB_GPIO23
-
enumerator INXB_SRC_GPIOB_GPIO41
-
enumerator INXB_SRC_GPIOB_GPIO22
-
enumerator INXB_SRC_GPIOB_GPIO7
-
enumerator INXB_SRC_GPIOB_GPIO44
-
enumerator INXB_SRC_GPIOC_GPIO5
-
enumerator INXB_SRC_GPIOC_GPIO9
-
enumerator INXB_SRC_GPIOC_GPIO61
-
enumerator INXB_SRC_GPIOC_GPIO59
-
enumerator INXB_SRC_GPIOC_GPIO10
-
enumerator INXB_SRC_GPIOC_GPIO34
-
enumerator INXB_SRC_GPIOC_GPIO15
-
enumerator INXB_SRC_GPIOC_GPIO14
-
enumerator INXB_SRC_GPIOC_GPIO6
-
enumerator INXB_SRC_GPIOC_GPIO30
-
enumerator INXB_SRC_GPIOC_GPIO31
-
enumerator INXB_SRC_GPIOC_GPIO29
-
enumerator INXB_SRC_GPIOC_GPIO72
-
enumerator INXB_SRC_GPIOC_GPIO74
-
enumerator INXB_SRC_GPIOC_GPIO73
-
enumerator INXB_SRC_GPIOC_GPIO75
-
enumerator INXB_SRC_GPIOD_GPIO64
-
enumerator INXB_SRC_GPIOD_GPIO80
-
enumerator INXB_SRC_GPIOD_GPIO55
-
enumerator INXB_SRC_GPIOD_GPIO60
-
enumerator INXB_SRC_GPIOD_GPIO20
-
enumerator INXB_SRC_GPIOD_GPIO21
-
enumerator INXB_SRC_GPIOD_GPIO13
-
enumerator INXB_SRC_GPIOD_GPIO12
-
enumerator INXB_SRC_GPIOD_GPIO11
-
enumerator INXB_SRC_GPIOD_GPIO33
-
enumerator INXB_SRC_GPIOD_GPIO16
-
enumerator INXB_SRC_GPIOD_GPIO17
-
enumerator INXB_SRC_GPIOD_GPIO25
-
enumerator INXB_SRC_GPIOD_GPIO26
-
enumerator INXB_SRC_GPIOD_GPIO27
-
enumerator INXB_SRC_GPIOD_GPIO37
-
enumerator INXB_SRC_GPIOE_GPIO35
-
enumerator INXB_SRC_GPIOE_GPIO43
-
enumerator INXB_SRC_GPIOE_GPIO56
-
enumerator INXB_SRC_GPIOE_GPIO57
-
enumerator INXB_SRC_GPIOE_GPIO58
-
enumerator INXB_SRC_GPIOE_GPIO39
-
enumerator INXB_SRC_GPIOE_GPIO42
-
enumerator INXB_SRC_GPIOE_GPIO65
-
enumerator INXB_SRC_GPIOE_GPIO62
-
enumerator INXB_SRC_GPIOE_GPIO83
-
enumerator INXB_SRC_GPIOE_GPIO84
-
enumerator INXB_SRC_GPIOE_GPIO85
-
enumerator INXB_SRC_GPIOE_GPIO71
-
enumerator INXB_SRC_GPIOE_GPIO82
-
enumerator INXB_SRC_GPIOE_GPIO81
-
enumerator INXB_SRC_GPIOE_GPIO45
-
enumerator INXB_SRC_GPIOF_SWCLK
-
enumerator INXB_SRC_GPIOF_SWDIO
-
enumerator INXB_SRC_GPIOF_GPIO32
-
enumerator INXB_SRC_GPIOF_GPIO24
-
enumerator INXB_SRC_GPIOA_GPIO47
-
enum XBAR_PFXB_SRC_TypeDef
SrPWM Fault and SrPWM Sync XBAR Source enumeration.
Values:
-
enumerator PFXB_SRC_MUX00_CMP_EVT0
-
enumerator PFXB_SRC_MUX00_CMP_EVT0_OR_EVT1
-
enumerator PFXB_SRC_MUX00_ADCA_EVT0
-
enumerator PFXB_SRC_MUX00_RESERVED
-
enumerator PFXB_SRC_MUX01_CMP_EVT1
-
enumerator PFXB_SRC_MUX01_INPUTXBAR0
-
enumerator PFXB_SRC_MUX01_ADCA_EVT1
-
enumerator PFXB_SRC_MUX01_ETIMOUT0
-
enumerator PFXB_SRC_MUX02_CMP_EVT2
-
enumerator PFXB_SRC_MUX02_CMP_EVT2_OR_EVT3
-
enumerator PFXB_SRC_MUX02_ADCA_EVT2
-
enumerator PFXB_SRC_MUX02_RESERVED
-
enumerator PFXB_SRC_MUX03_CMP_EVT3
-
enumerator PFXB_SRC_MUX03_INPUTXBAR1
-
enumerator PFXB_SRC_MUX03_ADCA_EVT3
-
enumerator PFXB_SRC_MUX03_ETIMOUT1
-
enumerator PFXB_SRC_MUX04_CMP_EVT4
-
enumerator PFXB_SRC_MUX04_CMP_EVT4_OR_EVT5
-
enumerator PFXB_SRC_MUX04_ADCB_EVT0
-
enumerator PFXB_SRC_MUX04_RESERVED
-
enumerator PFXB_SRC_MUX05_CMP_EVT5
-
enumerator PFXB_SRC_MUX05_INPUTXBAR2
-
enumerator PFXB_SRC_MUX05_ADCB_EVT1
-
enumerator PFXB_SRC_MUX05_ETIMOUT2
-
enumerator PFXB_SRC_MUX06_CMP_EVT6
-
enumerator PFXB_SRC_MUX06_CMP_EVT6_OR_EVT7
-
enumerator PFXB_SRC_MUX06_ADCB_EVT2
-
enumerator PFXB_SRC_MUX06_RESERVED
-
enumerator PFXB_SRC_MUX07_CMP_EVT7
-
enumerator PFXB_SRC_MUX07_INPUTXBAR3
-
enumerator PFXB_SRC_MUX07_ADCB_EVT3
-
enumerator PFXB_SRC_MUX07_ETIMOUT3
-
enumerator PFXB_SRC_MUX08_RESERVED
-
enumerator PFXB_SRC_MUX08_RESERVED1
-
enumerator PFXB_SRC_MUX08_ADCC_EVT0
-
enumerator PFXB_SRC_MUX08_RESERVED2
-
enumerator PFXB_SRC_MUX09_RESERVED
-
enumerator PFXB_SRC_MUX09_INPUTXBAR4
-
enumerator PFXB_SRC_MUX09_ADCC_EVT1
-
enumerator PFXB_SRC_MUX09_ETIMOUT4
-
enumerator PFXB_SRC_MUX10_RESERVED
-
enumerator PFXB_SRC_MUX10_ADCSOCAO
-
enumerator PFXB_SRC_MUX10_ADCC_EVT2
-
enumerator PFXB_SRC_MUX10_RESERVED1
-
enumerator PFXB_SRC_MUX11_RESERVED
-
enumerator PFXB_SRC_MUX11_INPUTXBAR5
-
enumerator PFXB_SRC_MUX11_ADCC_EVT3
-
enumerator PFXB_SRC_MUX11_RESERVED1
-
enumerator PFXB_SRC_MUX12_ERRORSTS
-
enumerator PFXB_SRC_MUX12_RESERVED
-
enumerator PFXB_SRC_MUX12_FLASH_ERR
-
enumerator PFXB_SRC_MUX12_RESERVED1
-
enumerator PFXB_SRC_MUX13_EXTSYNCOUT
-
enumerator PFXB_SRC_MUX13_INPUTXBAR6
-
enumerator PFXB_SRC_MUX13_CPU_HALT
-
enumerator PFXB_SRC_MUX13_RESERVED
-
enumerator PFXB_SRC_MUX14_RESERVED
-
enumerator PFXB_SRC_MUX14_ADCSOCBO
-
enumerator PFXB_SRC_MUX14_SYS_ERR
-
enumerator PFXB_SRC_MUX14_RESERVED1
-
enumerator PFXB_SRC_MUX15_RESERVED
-
enumerator PFXB_SRC_MUX15_INPUTXBAR7
-
enumerator PFXB_SRC_MUX15_PT_ERR
-
enumerator PFXB_SRC_MUX15_ETIMOUT5
-
enumerator PFXB_SRC_MUX16_SD0FLT0_EVT0
-
enumerator PFXB_SRC_MUX16_SD0FLT0_EVT0_OR_EVT1
-
enumerator PFXB_SRC_MUX16_RESERVED
-
enumerator PFXB_SRC_MUX16_RESERVED1
-
enumerator PFXB_SRC_MUX17_SD0FLT0_EVT1
-
enumerator PFXB_SRC_MUX17_INPUTXBAR8
-
enumerator PFXB_SRC_MUX17_RESERVED
-
enumerator PFXB_SRC_MUX17_ETIMOUT6
-
enumerator PFXB_SRC_MUX18_SD0FLT1_EVT0
-
enumerator PFXB_SRC_MUX18_SD0FLT1_EVT0_OR_EVT1
-
enumerator PFXB_SRC_MUX18_RESERVED
-
enumerator PFXB_SRC_MUX18_RESERVED1
-
enumerator PFXB_SRC_MUX19_SD0FLT1_EVT1
-
enumerator PFXB_SRC_MUX19_INPUTXBAR9
-
enumerator PFXB_SRC_MUX19_RESERVED
-
enumerator PFXB_SRC_MUX19_ETIMOUT7
-
enumerator PFXB_SRC_MUX20_SD0FLT2_EVT0
-
enumerator PFXB_SRC_MUX20_SD0FLT2_EVT0_OR_EVT1
-
enumerator PFXB_SRC_MUX20_RESERVED
-
enumerator PFXB_SRC_MUX20_RESERVED1
-
enumerator PFXB_SRC_MUX21_SD0FLT2_EVT1
-
enumerator PFXB_SRC_MUX21_INPUTXBAR10
-
enumerator PFXB_SRC_MUX21_RESERVED
-
enumerator PFXB_SRC_MUX21_ETIMOUT8
-
enumerator PFXB_SRC_MUX22_SD0FLT3_EVT0
-
enumerator PFXB_SRC_MUX22_SD0FLT3_EVT0_OR_EVT1
-
enumerator PFXB_SRC_MUX22_RESERVED
-
enumerator PFXB_SRC_MUX22_RESERVED1
-
enumerator PFXB_SRC_MUX23_SD0FLT3_EVT1
-
enumerator PFXB_SRC_MUX23_INPUTXBAR11
-
enumerator PFXB_SRC_MUX23_RESERVED
-
enumerator PFXB_SRC_MUX23_ETIMOUT9
-
enumerator PFXB_SRC_MUX24_SD1FLT0_EVT0
-
enumerator PFXB_SRC_MUX24_SD1FLT0_EVT0_OR_EVT1
-
enumerator PFXB_SRC_MUX24_SRPWM_XBAR_SYNC0
-
enumerator PFXB_SRC_MUX24_RESERVED
-
enumerator PFXB_SRC_MUX25_SD1FLT0_EVT1
-
enumerator PFXB_SRC_MUX25_INPUTXBAR12
-
enumerator PFXB_SRC_MUX25_RESERVED
-
enumerator PFXB_SRC_MUX25_ETIMOUT10
-
enumerator PFXB_SRC_MUX26_SD1FLT1_EVT0
-
enumerator PFXB_SRC_MUX26_SD1FLT1_EVT0_OR_EVT1
-
enumerator PFXB_SRC_MUX26_SRPWM_XBAR_SYNC1
-
enumerator PFXB_SRC_MUX26_RESERVED
-
enumerator PFXB_SRC_MUX27_SD1FLT1_EVT1
-
enumerator PFXB_SRC_MUX27_INPUTXBAR13
-
enumerator PFXB_SRC_MUX27_RESERVED
-
enumerator PFXB_SRC_MUX27_ETIMOUT11
-
enumerator PFXB_SRC_MUX28_SD1FLT2_EVT0
-
enumerator PFXB_SRC_MUX28_SD1FLT2_EVT0_OR_EVT1
-
enumerator PFXB_SRC_MUX28_SRPWM_XBAR_SYNC2
-
enumerator PFXB_SRC_MUX28_RESERVED
-
enumerator PFXB_SRC_MUX29_SD1FLT2_EVT1
-
enumerator PFXB_SRC_MUX29_INPUTXBAR14
-
enumerator PFXB_SRC_MUX29_RESERVED
-
enumerator PFXB_SRC_MUX29_ETIMOUT12
-
enumerator PFXB_SRC_MUX30_SD1FLT3_EVT0
-
enumerator PFXB_SRC_MUX30_SD1FLT3_EVT0_OR_EVT1
-
enumerator PFXB_SRC_MUX30_SRPWM_XBAR_SYNC3
-
enumerator PFXB_SRC_MUX30_RESERVED
-
enumerator PFXB_SRC_MUX31_SD1FLT3_EVT1
-
enumerator PFXB_SRC_MUX31_INPUTXBAR15
-
enumerator PFXB_SRC_MUX31_ERRORSTS
-
enumerator PFXB_SRC_MUX31_ETIMOUT13
-
enumerator PFXB_SRC_MUX00_CMP_EVT0
-
enum XBAR_ETXB_SRC_TypeDef
ETIM Trigger XBAR Source enumeration.
Values:
-
enumerator ETXB_SRC_MUX00_CMP_EVT0
-
enumerator ETXB_SRC_MUX00_CMP_EVT0_OR_EVT1
-
enumerator ETXB_SRC_MUX00_ADCA_EVT0
-
enumerator ETXB_SRC_MUX00_RESERVED
-
enumerator ETXB_SRC_MUX01_CMP_EVT1
-
enumerator ETXB_SRC_MUX01_INPUTXBAR0
-
enumerator ETXB_SRC_MUX01_ADCA_EVT1
-
enumerator ETXB_SRC_MUX01_RESERVED
-
enumerator ETXB_SRC_MUX02_CMP_EVT2
-
enumerator ETXB_SRC_MUX02_CMP_EVT2_OR_EVT3
-
enumerator ETXB_SRC_MUX02_ADCA_EVT2
-
enumerator ETXB_SRC_MUX02_RESERVED
-
enumerator ETXB_SRC_MUX03_CMP_EVT3
-
enumerator ETXB_SRC_MUX03_INPUTXBAR1
-
enumerator ETXB_SRC_MUX03_ADCA_EVT3
-
enumerator ETXB_SRC_MUX03_RESERVED
-
enumerator ETXB_SRC_MUX04_CMP_EVT4
-
enumerator ETXB_SRC_MUX04_CMP_EVT4_OR_EVT5
-
enumerator ETXB_SRC_MUX04_ADCB_EVT0
-
enumerator ETXB_SRC_MUX04_RESERVED
-
enumerator ETXB_SRC_MUX05_CMP_EVT5
-
enumerator ETXB_SRC_MUX05_INPUTXBAR2
-
enumerator ETXB_SRC_MUX05_ADCB_EVT1
-
enumerator ETXB_SRC_MUX05_RESERVED
-
enumerator ETXB_SRC_MUX06_CMP_EVT6
-
enumerator ETXB_SRC_MUX06_CMP_EVT6_OR_EVT7
-
enumerator ETXB_SRC_MUX06_ADCB_EVT2
-
enumerator ETXB_SRC_MUX06_RESERVED
-
enumerator ETXB_SRC_MUX07_CMP_EVT7
-
enumerator ETXB_SRC_MUX07_INPUTXBAR3
-
enumerator ETXB_SRC_MUX07_ADCB_EVT3
-
enumerator ETXB_SRC_MUX07_RESERVED
-
enumerator ETXB_SRC_MUX08_RESERVED
-
enumerator ETXB_SRC_MUX08_RESERVED1
-
enumerator ETXB_SRC_MUX08_ADCC_EVT0
-
enumerator ETXB_SRC_MUX08_RESERVED2
-
enumerator ETXB_SRC_MUX09_RESERVED
-
enumerator ETXB_SRC_MUX09_INPUTXBAR4
-
enumerator ETXB_SRC_MUX09_ADCC_EVT1
-
enumerator ETXB_SRC_MUX09_RESERVED1
-
enumerator ETXB_SRC_MUX10_RESERVED
-
enumerator ETXB_SRC_MUX10_RESERVED1
-
enumerator ETXB_SRC_MUX10_ADCC_EVT2
-
enumerator ETXB_SRC_MUX10_RESERVED2
-
enumerator ETXB_SRC_MUX11_RESERVED
-
enumerator ETXB_SRC_MUX11_INPUTXBAR5
-
enumerator ETXB_SRC_MUX11_ADCC_EVT3
-
enumerator ETXB_SRC_MUX11_RESERVED1
-
enumerator ETXB_SRC_MUX12_ERRORSTS
-
enumerator ETXB_SRC_MUX12_RESERVED
-
enumerator ETXB_SRC_MUX12_FLASH_ERR
-
enumerator ETXB_SRC_MUX12_RESERVED1
-
enumerator ETXB_SRC_MUX13_EXTSYNCOUT
-
enumerator ETXB_SRC_MUX13_INPUTXBAR6
-
enumerator ETXB_SRC_MUX13_CPU_HALT
-
enumerator ETXB_SRC_MUX13_RESERVED
-
enumerator ETXB_SRC_MUX14_RESERVED
-
enumerator ETXB_SRC_MUX14_CFG_ETXB_SWx
-
enumerator ETXB_SRC_MUX14_SYS_ERR
-
enumerator ETXB_SRC_MUX14_RESERVED1
-
enumerator ETXB_SRC_MUX15_RESERVED
-
enumerator ETXB_SRC_MUX15_INPUTXBAR7
-
enumerator ETXB_SRC_MUX15_PT_ERR
-
enumerator ETXB_SRC_MUX15_RESERVED1
-
enumerator ETXB_SRC_MUX16_SD0FLT0_EVT0
-
enumerator ETXB_SRC_MUX16_SD0FLT0_EVT0_OR_EVT1
-
enumerator ETXB_SRC_MUX16_RESERVED
-
enumerator ETXB_SRC_MUX16_RESERVED1
-
enumerator ETXB_SRC_MUX17_SD0FLT0_EVT1
-
enumerator ETXB_SRC_MUX17_INPUTXBAR8
-
enumerator ETXB_SRC_MUX17_RESERVED
-
enumerator ETXB_SRC_MUX17_RESERVED1
-
enumerator ETXB_SRC_MUX18_SD0FLT1_EVT0
-
enumerator ETXB_SRC_MUX18_SD0FLT1_EVT0_OR_EVT1
-
enumerator ETXB_SRC_MUX18_RESERVED
-
enumerator ETXB_SRC_MUX18_RESERVED1
-
enumerator ETXB_SRC_MUX19_SD0FLT1_EVT1
-
enumerator ETXB_SRC_MUX19_INPUTXBAR9
-
enumerator ETXB_SRC_MUX19_RESERVED
-
enumerator ETXB_SRC_MUX19_RESERVED1
-
enumerator ETXB_SRC_MUX20_SD0FLT2_EVT0
-
enumerator ETXB_SRC_MUX20_SD0FLT2_EVT0_OR_EVT1
-
enumerator ETXB_SRC_MUX20_RESERVED
-
enumerator ETXB_SRC_MUX20_RESERVED1
-
enumerator ETXB_SRC_MUX21_SD0FLT2_EVT1
-
enumerator ETXB_SRC_MUX21_INPUTXBAR10
-
enumerator ETXB_SRC_MUX21_RESERVED
-
enumerator ETXB_SRC_MUX21_RESERVED1
-
enumerator ETXB_SRC_MUX22_SD0FLT3_EVT0
-
enumerator ETXB_SRC_MUX22_SD0FLT3_EVT0_OR_EVT1
-
enumerator ETXB_SRC_MUX22_RESERVED
-
enumerator ETXB_SRC_MUX22_RESERVED1
-
enumerator ETXB_SRC_MUX23_SD0FLT3_EVT1
-
enumerator ETXB_SRC_MUX23_INPUTXBAR11
-
enumerator ETXB_SRC_MUX23_RESERVED
-
enumerator ETXB_SRC_MUX23_RESERVED1
-
enumerator ETXB_SRC_MUX24_SD1FLT0_EVT0
-
enumerator ETXB_SRC_MUX24_SD1FLT0_EVT0_OR_EVT1
-
enumerator ETXB_SRC_MUX24_RESERVED
-
enumerator ETXB_SRC_MUX24_RESERVED1
-
enumerator ETXB_SRC_MUX25_SD1FLT0_EVT1
-
enumerator ETXB_SRC_MUX25_INPUTXBAR12
-
enumerator ETXB_SRC_MUX25_RESERVED
-
enumerator ETXB_SRC_MUX25_RESERVED1
-
enumerator ETXB_SRC_MUX26_SD1FLT1_EVT0
-
enumerator ETXB_SRC_MUX26_SD1FLT1_EVT0_OR_EVT1
-
enumerator ETXB_SRC_MUX26_RESERVED
-
enumerator ETXB_SRC_MUX26_RESERVED1
-
enumerator ETXB_SRC_MUX27_SD1FLT1_EVT1
-
enumerator ETXB_SRC_MUX27_INPUTXBAR13
-
enumerator ETXB_SRC_MUX27_RESERVED
-
enumerator ETXB_SRC_MUX27_RESERVED1
-
enumerator ETXB_SRC_MUX28_SD1FLT2_EVT0
-
enumerator ETXB_SRC_MUX28_SD1FLT2_EVT0_OR_EVT1
-
enumerator ETXB_SRC_MUX28_RESERVED
-
enumerator ETXB_SRC_MUX28_RESERVED1
-
enumerator ETXB_SRC_MUX29_SD1FLT2_EVT1
-
enumerator ETXB_SRC_MUX29_INPUTXBAR14
-
enumerator ETXB_SRC_MUX29_RESERVED
-
enumerator ETXB_SRC_MUX29_RESERVED1
-
enumerator ETXB_SRC_MUX30_SD1FLT3_EVT0
-
enumerator ETXB_SRC_MUX30_SD1FLT3_EVT0_OR_EVT1
-
enumerator ETXB_SRC_MUX30_CFG_ETXB_SWx
-
enumerator ETXB_SRC_MUX30_RESERVED
-
enumerator ETXB_SRC_MUX31_SD1FLT3_EVT1
-
enumerator ETXB_SRC_MUX31_INPUTXBAR15
-
enumerator ETXB_SRC_MUX31_ERRORSTS
-
enumerator ETXB_SRC_MUX31_RESERVED
-
enumerator ETXB_SRC_MUX00_CMP_EVT0
-
enum XBAR_OPXB_SRC_TypeDef
Output XBAR Source enumeration.
Values:
-
enumerator OPXB_SRC_MUX00_CMP_OUT0
-
enumerator OPXB_SRC_MUX00_CMP_OUT0_OR_OUT1
-
enumerator OPXB_SRC_MUX00_ADCA_EVT0
-
enumerator OPXB_SRC_MUX00_RESERVED
-
enumerator OPXB_SRC_MUX01_CMP_OUT1
-
enumerator OPXB_SRC_MUX01_INPUTXBAR0
-
enumerator OPXB_SRC_MUX01_ADCA_EVT1
-
enumerator OPXB_SRC_MUX01_ETIMOUT0
-
enumerator OPXB_SRC_MUX02_CMP_OUT2
-
enumerator OPXB_SRC_MUX02_CMP_OUT2_OR_OUT3
-
enumerator OPXB_SRC_MUX02_ADCA_EVT2
-
enumerator OPXB_SRC_MUX02_RESERVED
-
enumerator OPXB_SRC_MUX03_CMP_OUT3
-
enumerator OPXB_SRC_MUX03_INPUTXBAR1
-
enumerator OPXB_SRC_MUX03_ADCA_EVT3
-
enumerator OPXB_SRC_MUX03_ETIMOUT1
-
enumerator OPXB_SRC_MUX04_CMP_OUT4
-
enumerator OPXB_SRC_MUX04_CMP_OUT4_OR_OUT5
-
enumerator OPXB_SRC_MUX04_ADCB_EVT0
-
enumerator OPXB_SRC_MUX04_RESERVED
-
enumerator OPXB_SRC_MUX05_CMP_OUT5
-
enumerator OPXB_SRC_MUX05_INPUTXBAR2
-
enumerator OPXB_SRC_MUX05_ADCB_EVT1
-
enumerator OPXB_SRC_MUX05_ETIMOUT2
-
enumerator OPXB_SRC_MUX06_CMP_OUT6
-
enumerator OPXB_SRC_MUX06_CMP_OUT6_OR_OUT7
-
enumerator OPXB_SRC_MUX06_ADCB_EVT2
-
enumerator OPXB_SRC_MUX06_RESERVED
-
enumerator OPXB_SRC_MUX07_CMP_OUT7
-
enumerator OPXB_SRC_MUX07_INPUTXBAR3
-
enumerator OPXB_SRC_MUX07_ADCB_EVT3
-
enumerator OPXB_SRC_MUX07_ETIMOUT3
-
enumerator OPXB_SRC_MUX08_RESERVED
-
enumerator OPXB_SRC_MUX08_CFG_OPXB_SWx
-
enumerator OPXB_SRC_MUX08_ADCC_EVT0
-
enumerator OPXB_SRC_MUX08_RESERVED1
-
enumerator OPXB_SRC_MUX09_RESERVED
-
enumerator OPXB_SRC_MUX09_INPUTXBAR4
-
enumerator OPXB_SRC_MUX09_ADCC_EVT1
-
enumerator OPXB_SRC_MUX09_ETIMOUT4
-
enumerator OPXB_SRC_MUX10_RESERVED
-
enumerator OPXB_SRC_MUX10_ADCSOCAO
-
enumerator OPXB_SRC_MUX10_ADCC_EVT2
-
enumerator OPXB_SRC_MUX10_RESERVED1
-
enumerator OPXB_SRC_MUX11_RESERVED
-
enumerator OPXB_SRC_MUX11_INPUTXBAR5
-
enumerator OPXB_SRC_MUX11_ADCC_EVT3
-
enumerator OPXB_SRC_MUX11_RESERVED1
-
enumerator OPXB_SRC_MUX12_ERRORSTS
-
enumerator OPXB_SRC_MUX12_CFG_OPXB_SWx
-
enumerator OPXB_SRC_MUX12_FLASH_ERR
-
enumerator OPXB_SRC_MUX12_RESERVED
-
enumerator OPXB_SRC_MUX13_EXTSYNCOUT
-
enumerator OPXB_SRC_MUX13_INPUTXBAR6
-
enumerator OPXB_SRC_MUX13_CPU_HALT
-
enumerator OPXB_SRC_MUX13_RESERVED
-
enumerator OPXB_SRC_MUX14_RESERVED
-
enumerator OPXB_SRC_MUX14_ADCSOCBO
-
enumerator OPXB_SRC_MUX14_SYS_ERR
-
enumerator OPXB_SRC_MUX14_RESERVED1
-
enumerator OPXB_SRC_MUX15_RESERVED
-
enumerator OPXB_SRC_MUX15_INPUTXBAR7
-
enumerator OPXB_SRC_MUX15_PT_ERR
-
enumerator OPXB_SRC_MUX15_ETIMOUT5
-
enumerator OPXB_SRC_MUX16_SD0FLT0_EVT0
-
enumerator OPXB_SRC_MUX16_SD0FLT0_EVT0_OR_EVT1
-
enumerator OPXB_SRC_MUX16_STM0_OC0
-
enumerator OPXB_SRC_MUX16_RESERVED
-
enumerator OPXB_SRC_MUX17_SD0FLT0_EVT1
-
enumerator OPXB_SRC_MUX17_INPUTXBAR8
-
enumerator OPXB_SRC_MUX17_STM0_OC1
-
enumerator OPXB_SRC_MUX17_ETIMOUT6
-
enumerator OPXB_SRC_MUX18_SD0FLT1_EVT0
-
enumerator OPXB_SRC_MUX18_SD0FLT1_EVT0_OR_EVT1
-
enumerator OPXB_SRC_MUX18_STM0_OC2
-
enumerator OPXB_SRC_MUX18_RESERVED
-
enumerator OPXB_SRC_MUX19_SD0FLT1_EVT1
-
enumerator OPXB_SRC_MUX19_INPUTXBAR9
-
enumerator OPXB_SRC_MUX19_STM0_OC3
-
enumerator OPXB_SRC_MUX19_ETIMOUT7
-
enumerator OPXB_SRC_MUX20_SD0FLT2_EVT0
-
enumerator OPXB_SRC_MUX20_SD0FLT2_EVT0_OR_EVT1
-
enumerator OPXB_SRC_MUX20_STM1_OC0
-
enumerator OPXB_SRC_MUX20_RESERVED
-
enumerator OPXB_SRC_MUX21_SD0FLT2_EVT1
-
enumerator OPXB_SRC_MUX21_INPUTXBAR10
-
enumerator OPXB_SRC_MUX21_STM1_OC1
-
enumerator OPXB_SRC_MUX21_ETIMOUT8
-
enumerator OPXB_SRC_MUX22_SD0FLT3_EVT0
-
enumerator OPXB_SRC_MUX22_SD0FLT3_EVT0_OR_EVT1
-
enumerator OPXB_SRC_MUX22_STM1_OC2
-
enumerator OPXB_SRC_MUX22_RESERVED
-
enumerator OPXB_SRC_MUX23_SD0FLT3_EVT1
-
enumerator OPXB_SRC_MUX23_INPUTXBAR11
-
enumerator OPXB_SRC_MUX23_STM1_OC3
-
enumerator OPXB_SRC_MUX23_ETIMOUT9
-
enumerator OPXB_SRC_MUX24_SD1FLT0_EVT0
-
enumerator OPXB_SRC_MUX24_SD1FLT0_EVT0_OR_EVT1
-
enumerator OPXB_SRC_MUX24_SRPWM_XBAR_SYNC0
-
enumerator OPXB_SRC_MUX24_INPUTXBAR_CLU2OUT0
-
enumerator OPXB_SRC_MUX25_SD1FLT0_EVT1
-
enumerator OPXB_SRC_MUX25_INPUTXBAR12
-
enumerator OPXB_SRC_MUX25_RESERVED
-
enumerator OPXB_SRC_MUX25_ETIMOUT10
-
enumerator OPXB_SRC_MUX26_SD1FLT1_EVT0
-
enumerator OPXB_SRC_MUX26_SD1FLT1_EVT0_OR_EVT1
-
enumerator OPXB_SRC_MUX26_SRPWM_XBAR_SYNC1
-
enumerator OPXB_SRC_MUX26_INPUTXBAR_CLU2OUT1
-
enumerator OPXB_SRC_MUX27_SD1FLT1_EVT1
-
enumerator OPXB_SRC_MUX27_INPUTXBAR13
-
enumerator OPXB_SRC_MUX27_RESERVED
-
enumerator OPXB_SRC_MUX27_ETIMOUT11
-
enumerator OPXB_SRC_MUX28_SD1FLT2_EVT0
-
enumerator OPXB_SRC_MUX28_SD1FLT2_EVT0_OR_EVT1
-
enumerator OPXB_SRC_MUX28_SRPWM_XBAR_SYNC2
-
enumerator OPXB_SRC_MUX28_INPUTXBAR_CLU2OUT2
-
enumerator OPXB_SRC_MUX29_SD1FLT2_EVT1
-
enumerator OPXB_SRC_MUX29_INPUTXBAR14
-
enumerator OPXB_SRC_MUX29_RESERVED
-
enumerator OPXB_SRC_MUX29_ETIMOUT12
-
enumerator OPXB_SRC_MUX30_SD1FLT3_EVT0
-
enumerator OPXB_SRC_MUX30_SD1FLT3_EVT0_OR_EVT1
-
enumerator OPXB_SRC_MUX30_SRPWM_XBAR_SYNC3
-
enumerator OPXB_SRC_MUX30_INPUTXBAR_CLU2OUT3
-
enumerator OPXB_SRC_MUX31_SD1FLT3_EVT1
-
enumerator OPXB_SRC_MUX31_INPUTXBAR15
-
enumerator OPXB_SRC_MUX31_ERRORSTS
-
enumerator OPXB_SRC_MUX31_ETIMOUT13
-
enumerator OPXB_SRC_MUX00_CMP_OUT0
-
enum XBAR_OUT_DSEL_TypeDef
XBAR Input Signal Edge trigger type enumeration.
Values:
-
enumerator XBAR_DSEL_MUX_OUT
Select Signal after MUX out
-
enumerator XBAR_DSEL_LATCHED_HI
Select Signal after Latched High level
-
enumerator XBAR_DSEL_EDGE_RISING
Select Signal after Latched Rising
-
enumerator XBAR_DSEL_EDGE_FALLING
Select Signal after Latched Falling
-
enumerator XBAR_DSEL_MUX_OUT
-
enum XBAR_OPXB_OEMOD_TypeDef
XBAR OPXB Output Signal mode type enumeration.
Values:
-
enumerator XBAR_OPXB_OEMOD_VALID
output always valid
-
enumerator XBAR_OPXB_OEMOD_PWM_OE
if input signal include etimer pwm out signal, output select etimer pwm oe signal as EN signal
-
enumerator XBAR_OPXB_OEMOD_TRI_STATE
output always tri-state
-
enumerator XBAR_OPXB_OEMOD_VALID1
same as XBAR_OPXB_OEMOD_VALID
-
enumerator XBAR_OPXB_OEMOD_VALID
-
enum XBAR_INXB_IRQ_TypeDef
XBAR INXB Output channel for interrupt mask enumeration.
Values:
-
enumerator XBAR_INXB_OUTPUT_CH12_IRQ0
INXB output channel 12 for generate irq 0
-
enumerator XBAR_INXB_OUTPUT_CH13_IRQ1
INXB output channel 13 for generate irq 1
-
enumerator XBAR_INXB_OUTPUT_CH14_IRQ2
INXB output channel 14 for generate irq 2
-
enumerator XBAR_INXB_OUTPUT_CH15_IRQ3
INXB output channel 15 for generate irq 3
-
enumerator XBAR_INXB_OUTPUT_CH12_IRQ0
-
enum XBAR_CLU_TypeDef
XBAR CLU module enumeration.
Values:
-
enumerator XBAR_CLU_XCSA
XBAR CLU2ADC
-
enumerator XBAR_CLU_XCET
XBAR CLU2ETIMER
-
enumerator XBAR_CLU_XCOX
XBAR CLU2OutputXBAR
-
enumerator XBAR_CLU_XCSA
-
enum XBAR_CLU_EDGE_TypeDef
XBAR CLU out edge type enumeration.
Values:
-
enumerator XBAR_CLU_EDGE_RISE
XBAR CLU out edge Rise
-
enumerator XBAR_CLU_EDGE_FALLING
XBAR CLU out edge Falling
-
enumerator XBAR_CLU_EDGE_BOTH
XBAR CLU out edge both Rise and Falling
-
enumerator XBAR_CLU_EDGE_RISE
-
enum XBAR_CLU_UNIT_TypeDef
XBAR CLU logic unit type enumeration.
Values:
-
enumerator XBAR_CLU_ANDOR
XBAR CLU logic unit AND-OR
-
enumerator XBAR_CLU_ORXOR
XBAR CLU logic unit OR-XOR
-
enumerator XBAR_CLU_4INAND
XBAR CLU logic unit 4 Input AND
-
enumerator XBAR_CLU_SRLATCH
XBAR CLU logic unit S-R Latch
-
enumerator XBAR_CLU_1INDFF
XBAR CLU logic unit 1 Input Set-Reset flip-flop
-
enumerator XBAR_CLU_2INDFF
XBAR CLU logic unit 2 Input Set-Reset flip-flop
-
enumerator XBAR_CLU_JKFF
XBAR CLU logic unit J-K flip-flop
-
enumerator XBAR_CLU_LATCH
XBAR CLU logic unit Set-Reset Latch
-
enumerator XBAR_CLU_ANDOR
-
enum XBAR_FALUT_SRC_TypeDef
XBAR Fault Source type enumeration.
Values:
-
enumerator XBAR_FAULT_PWR_TEMP_WARN
-
enumerator XBAR_FAULT_PWR_POWER_ERR
-
enumerator XBAR_FAULT_PWR_PWR_OCP_WARN
-
enumerator XBAR_FAULT_PWR_POR_UV_WARN
-
enumerator XBAR_FAULT_SYS_CLOCK_FAULT
-
enumerator XBAR_FAULT_SYS_CPU_BUS_ERR
-
enumerator XBAR_FAULT_SYS_BUS_TIMEOUT
-
enumerator XBAR_FAULT_SYS_CAN_ECC_ERR
-
enumerator XBAR_FAULT_SYS_SRAM_ECC_ERR
-
enumerator XBAR_FAULT_SYS_CPU_ECC_ERR
-
enumerator XBAR_FAULT_SYS_CPU_LOCKUP
-
enumerator XBAR_FAULT_SYS_CPU_RST_REC
-
enumerator XBAR_FAULT_SYS_WDG1_REQ_REC
-
enumerator XBAR_FAULT_SYS_WDG0_REQ_REC
-
enumerator XBAR_FAULT_FLASH_DFLASH_BUS_ERR
-
enumerator XBAR_FAULT_FLASH_DFLASH_ECC_ERR
-
enumerator XBAR_FAULT_FLASH_PFLASH_BUS_ERR
-
enumerator XBAR_FAULT_FLASH_PFLASH_ECC_ERR
XBAR Fault source PFlash ECC Error
-
enumerator XBAR_FAULT_PWR_TEMP_WARN